Applications Engineering Technical Lead - Santa Clara, CA
Advantage Resourcing is seeking a Applications Engineering Technical Lead for our client in Santa Clara, CA.
• Act as the technical lead in customer engagements, being the point-person for all technical issues, delegating and working with the engineering teams and other members of the Applications team as appropriate.
• Work with the Technical Project Manager (TPM) to jointly drive the technical and the management aspects of primarily new and on-going Speedcore engagements.
• Ensure seamless hand-offs between factory applications and field engineering teams for all technical issues and deliverables that are a part of technical engagements.
• Provide support to customers worldwide, to resolve challenging technical issues and ensure successful integration of our client’s programmable logic solutions.
• Work closely with engineering to drive product planning and implementation efforts. Provide guidance based on industry experiences and trends on product roadmaps and strategies.
• Put together reference/demo designs, other technical collateral like user guides and application notes to showcase and document FPGA features to customers.
• Provide on-site support to customers as needed, for issues ranging from software set-up to benchmarking and silicon characterization.
• Up to 25% travel may be required.
• Background in back-end (ASIC) implementation methodology, concepts and tools.
• Familiarity with IP deliverables including, but not limited to, GDSII, LEF, lib files and CPM.
• Good communication and writing skills with ability to multi-task.
• Verilog expertise; System Verilog and VHDL knowledge is a plus.
• Fluency in Mandarin, and ability to translate from English to Mandarin is a must.
• Solid understanding of FPGA / programmable logic architecture and design flows is a plus.
• Strong logic design and verification background with experience in STA is a plus.
• Knowledge of SerDes PMA/PCS architecture and protocol IP – in particular PCIe, Interlaken and 10G/40G/100G Ethernet – and how SerDes need to be set up to work in such cases is a plus.
• Experience with DDR3/4 memory interfaces and understanding of HMC/HBM solutions is a plus.
• Experience with processors, specifically with relation to FPGA implementation, is a plus.
• 10 years experience working with FPGAs and/or ASICs in an applications, system-level or architect role
• Ability to work in the lab with test equipment (oscilloscopes, function generators, logic analyzers etc.)
Bachelor’s or Master’s degree in EE, CE or equivalent work experience
If you are interested in applying, please email me at: IBarba (at) advantageresourcing.com, call 408-367-1477, or click the “Apply” button.
Santa Clara, CA
United States of America
Information Technology / IT - Software
Direct Hire Position
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Job Title: Applications Engineering Technical Lead
Location: Santa Clara, CA
Job Type: Direct Hire Position
Reference ID: 362357
Posted Date: 4/3/2019